Showing posts with label DDR2. Show all posts
Showing posts with label DDR2. Show all posts

Wednesday, April 16, 2014

Length Matching for High-Speed Differential Pairs


Tpd - One of my favorite topics.

http://pcdandf.com/cms/images/stories/mag/0502/0502strategies.pdf


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Monday, November 4, 2013

Analyzing DDR2/3/4 with Hyperlynx: - Mentor Graphics

On Demand Webinar

Analyzing DDR2/3/4 Memory Interfaces: Guarantee Your Margins Before You Build and Ship Boards - Mentor Graphics:

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Friday, September 13, 2013

DDRx Design Topologies

Source: TI App Note SPRAB11A

Typical DDR2 Balanced "T" Topology





















Typical DDR3 Fly By Topology













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Sunday, December 30, 2012

DDR2 - Freescale App Note 4215

MX28 Layout and Design Guidelines.

This application note has excellent advice for DDR2 designs.

Freescale DDR2 - AN4215.pdf

Tuesday, September 25, 2012