How to measure propagation velocity through a trace on a pcb? - Electrical Engineering Stack Exchange:
'via Blog this'
Saturday, October 31, 2015
High Speed Analog Design and Application Seminar
Section 1. Understanding Voltage Feedback and Current Feedback Amplifiers
Section 2. Useful Things to Know About Amplifiers
Section 3. Useful Things to Know about A/D Converters
Section 4. Selecting the right high-speed Amplifier
Section 5. High-speed layout
Section 6. Application design
Source: Texas Instruments
Section 2. Useful Things to Know About Amplifiers
Section 3. Useful Things to Know about A/D Converters
Section 4. Selecting the right high-speed Amplifier
Section 5. High-speed layout
Section 6. Application design
Source: Texas Instruments
Via Calculations
Via Calculations
click on image to view
Source:
High Speed Analog Design and Application Seminar
Section 5. - Texas Instruments
'via Blog this'
click on image to view
Source:
High Speed Analog Design and Application Seminar
Section 5. - Texas Instruments
'via Blog this'
Monday, October 26, 2015
Thursday, October 22, 2015
Characterization of a Printed Circuit Board Via
"Design Guidelines
[1] Use the minimum size drill bit for creating the via cylinder. This has less to do with lowering the capacitance of the via and more to do with raising its inductance. Since a via looks like a region of low impedance compared to a traditional printed circuit board transmission line, raising the inductance will increase its characteristic impedance to better match the connecting lines.
[2] Use the minimum size pad that the PCB manufacturer allows. The pad is the source of the most capacitance. The ideal case would be to connect the transmission lines directly to the via cylinder.
[3] Do not use the minimum size ground clearance radius. This is counterintuitive since in most cases, smaller is better. By having a small portion of the connecting traces near the via NOT run over a ground plane, two regions of higher impedance immediately before and after the via are introduced. These regions of higher impedance will counter the lower impedance characteristic of the via and better match the line. This effect can also be accomplished by placing very small surface mount inductors in series with the via immediately before and after.
[4] Use the thinnest printed circuit board possible. This will reduce the overall height of all vias on the board. Reducing the height of the via will decrease the length of the discontinuity that the signal has to pass through.
[5] Place vias that connect the ground planes together near the signal vias that pass through multiple ground planes. This provides a low impedance path for the return current to flow when the signal changes layers. This will reduce the discontinuities caused by the via."
Source: www.coe.montana.edu/ee/lameres/vitae/publications/a_thesis/thesis_002_msee.pdf
'via Blog this'
[1] Use the minimum size drill bit for creating the via cylinder. This has less to do with lowering the capacitance of the via and more to do with raising its inductance. Since a via looks like a region of low impedance compared to a traditional printed circuit board transmission line, raising the inductance will increase its characteristic impedance to better match the connecting lines.
[2] Use the minimum size pad that the PCB manufacturer allows. The pad is the source of the most capacitance. The ideal case would be to connect the transmission lines directly to the via cylinder.
[3] Do not use the minimum size ground clearance radius. This is counterintuitive since in most cases, smaller is better. By having a small portion of the connecting traces near the via NOT run over a ground plane, two regions of higher impedance immediately before and after the via are introduced. These regions of higher impedance will counter the lower impedance characteristic of the via and better match the line. This effect can also be accomplished by placing very small surface mount inductors in series with the via immediately before and after.
[4] Use the thinnest printed circuit board possible. This will reduce the overall height of all vias on the board. Reducing the height of the via will decrease the length of the discontinuity that the signal has to pass through.
[5] Place vias that connect the ground planes together near the signal vias that pass through multiple ground planes. This provides a low impedance path for the return current to flow when the signal changes layers. This will reduce the discontinuities caused by the via."
Source: www.coe.montana.edu/ee/lameres/vitae/publications/a_thesis/thesis_002_msee.pdf
'via Blog this'
Sunday, October 18, 2015
Microwaves101 | Keffective
Effective Er (Dk)
In all transmission lines, the propagation velocity is c/SQRT(Keff)
"K" refers to the effective dielectric constant, also called Epsilon_effective (Ee).
Source: Microwaves101 | Keffective:
'via Blog this'
In all transmission lines, the propagation velocity is c/SQRT(Keff)
"K" refers to the effective dielectric constant, also called Epsilon_effective (Ee).
Source: Microwaves101 | Keffective:
'via Blog this'
Saturday, October 17, 2015
High Speed Board Layout Guidelines - Altera
Friday, October 16, 2015
Thursday, October 15, 2015
Problem with 'No Clean' Solder Flux Residue
Problem with 'No Clean' Solder Flux Residue:
Source: Experts opinions: http://www.circuitnet.com/experts/56589.html
'via Blog this'
Example:
“Just to
be clear, no-clean does not mean that it does not have to be cleaned. It simply
means that it leaves behind less residue than higher solids content fluxes. The
residue is most likely lightly corrosive. The white residue is most likely
unencapsulated metal salts. Conformal coating over the top of the residue is
not recommend.
The
potential for electro-migration is increased when flux (no-clean or otherwise)
is allowed to stay on the assembly. It only takes three key ingredients to grow
dendrites (metal crystals) on a board. These three ingredients are voltage,
conductive / corrosive material (flux) and moisture (humidity). The flux residue forms a conductive path connecting an
anode to a cathode. The results are either electrical leakage
(a temporary problem) or dendrite growth (a permanent problem).”
Source: Experts opinions: http://www.circuitnet.com/experts/56589.html
'via Blog this'
Subscribe to:
Posts (Atom)