Aligni - Unified PLM

 Aligni URL: Unified PLM and MRP for high-tech manufacturers

BGA - Rework and Reball

BGA and PCB Rework Services

Microelectronics packaging, device design and manufacturing - ISI

BGA Rework Stations & PCB Rework Services - Precision PCB Services

Circuit board rework and repair - BGA component rework and repair

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Lord Kelvin's Quote

 

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Electronic Tutorials

If you are looking for some good Electronic educational material try . . . 

Electronics Tutorials

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Ethernet Design Guidelines

"The total length of each MII trace should be less than 6 inches, or 6000 mils. The traces should be length matched within 20 mils for 1G transmissions and length-matched within 50 mils for 100M or 10M transmissions. RX traces must be length-matched to the other RX traces, and TX traces must be length-matched to the other TX traces. The number of vias and stubs on the MII traces should be kept to a minimum."  

Magnetic Isolation No metal should be under the magnetics on any layer. If metal is needed under the magnetics, it must be separated by a ground plane at the least. Metal under the RJ45 connector with integrated magnetic is allowed.

Source Texas Instruments: 

Ethernet PHY PCB Design Layout Checklist - Texas Instruments

Chassis / GND for RJ45 with Integrated Magnetics 

Source NXP APP Note 4215:

https://www.nxp.com/docs/en/application-note/AN4215.pdf

Layout Considerations for Pulse Ethernet Magnetics

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Vias are critical to PCB functionality as the conduit for transferring signals between layers. Vias can remain open, tented over with soldermask or filled solid with either non-conductive or conductive material.

Conductively filled vias add capacity to the design, and using copper to fill the vias adds some benefits that other conductive material does not, including thermal and electrical conductivity. The high thermal conductivity of copper-filled vias provides an advantage in high heat applications and the added electrical conductivity provides superior current-carrying capability in high voltage applications.

ASC’s John Bushie takes us through the complex manufacturing process in this month’s video.

Copper Plated Filled Vias - YouTube

Slots

Typical slot for a 1mm router bit

3D View

Notes:  

Slot length = X

Y Pad size = Hole Size

Soldermask expansion 5mils

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WonderMASK

 

WonderMASK PX Fast-Dry...

Container Type: 8 oz Squeeze Bottle. 

Application: 

Prevents solder from flowing into contacts, terminals, screw heads, and plated through holes
Material: Latex

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Formal Stackups are Designed by Fabricators

Formal Stackups are designed by Fabricators, NOT PCB designers.

PCB designers create requirements that the fabricators use to design the stackup.

Fabricators can select from a wide variety of materials, like . . . 

Cores, PrePregs, Glass Weaves and Resin Contents

Fabricators make material choices that meet their manufacturing processes needs.

Here's what PCB Designers can and SHOULD do:

When requesting a stackup let the fabricator know if the design is using VIPPO or heavy copper.

Let the fabricator know if you have CAF concerns or if you need high speed glass.

For High-speed and RF you may want to specify materials that have low Df specs.

Specify the Desired Overall Board Thickness +/- 10%

PCB Designers Create Fab Drawings with Controlled Requirements, like . . . 

50 OHM 0.005" TRACES L1 REF TO L2 +/- 10%

50 OHM 0.004" TRACES L3 REF TO L2 AND L4 +/- 10%

100 DIFF 0.004" TRACES, PITCH 12 (GAP + WIDTH = PITCH)

RF TRACES

50 RB/CPW 0.020" TRACES, PITCH 30 L1 REF TO L4 +/- 10%

Designers can add notes to the project Fab Drawing, like . . .

Reference Only: Refer to Fabricator Stackup.

Customer Approval is Required for Stackup Changes.

The requirements in the fab drawing will drive the stackup designed by the fabricator.

PCB Designers can use various calculators to approximate the stackup, however the final stackup needs to come from the fabricator that is fabricating the PCB and performing TDR tests for the controlled impedances.

To expedite designs and minimize layout rework a formal stackup should be obtained from the preferred fabricator to optimize controlled impedances. 

Length matching may also need to be reworked if it is done before a formal (fabricator) stackup is obtained.

Summary: Working with a fabricator sooner, rather than later is highly recommended.

Abbreviations:

CAF is Cathodic Anodic Filament

Df is Dissipation Factor ( signal attention at higher frequencies )

VIPPO is Via In Pad Plated Over

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Inductor Saturation

How to avoid inductor saturation in your power supply design

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Crisis in Printed Circuit Board Supply Chain

"We are now facing crisis in supply of Printed Circuit Boards, impacting the price and lead-time.

To understand better the root cause, sharing the information we have compiled for your reference and study. Will keep you updated as we get more information."

Source: Linkedin Karuna Karan

20201208 | Evertiq | Is this the perform storm | Mark Goodwin [https://evertiq.com/news/49258]
20210311 | Evertiq | Europe needs to move faster to meet the demand [https://evertiq.com/news/49709]
20201218 | inconnect007 | Prices of Copper-clad Laminates continue to rise [http://pcb.iconnect007.com/index.php/article/125710/prices-of-copper-clad-laminates-continue-to-rise/125713/]
20210225 | Bloomberg | How High can Copper Fly ? | Jack Farchy | [https://www.bloomberg.com/news/articles/2021-02-25/copper-s-green-allure-may-boost-prices-to-12-000-concord-says]
20200618 | S&P Global | Copper markets faces supply crunch | Kip Kleen [https://www.spglobal.com/marketintelligence/en/news-insights/latest-news-headlines/copper-market-faces-supply-crunch-fueled-by-decreasing-discoveries-experts-say-59087497]
20210319 | DigiTimes | Copper foil shortage worsens | Jane Wang, Taipei; Jessie Shen [https://www.digitimes.com/news/a20210319PD210.html]
20210224 | DigiTimes |CCL prices may rise further later in 1H21 |Jay Liu, Taipei; Willis Ke [https://www.digitimes.com/news/a20210224PD207.html]
20201222 | DigiTimes | PCB materials prices set to rise in 2021 | Jay Liu, Taipei; Willis Ke [https://www.digitimes.com/news/a20201222PD204.html]
20210330 | DigiTimes | Taiwan CCL makers to raise quotes by 15-20% in April | Jay Liu, Taipei; Willis Ke [https://www.digitimes.com/news/a20210330PD204.html]

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Intel - DC DC CONVERTER 1.8-3.3V 3W with Integrated Magnetics

DC DC Converter Output 1.8 ~ 3.3V - - 1A 2.4V - 5.5V Input EP53A7HQI Intel | Power Supplies - Board Mount | DigiKey

click on image to view

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Isola Slash Sheets

Isola laminate and prepreg materials are certified to IPC-4101 or IPC-4103.

IPC-4101, “Specification for Base Materials for Rigid and Multi-layer Printed Boards,” covers the requirements for laminate or prepreg used primarily for rigid or multi-layer printed boards for electrical and electronic circuits. Each specification sheet outlines requirements for both laminate and prepreg for each product grade. The specification sheets are organized by reinforcement type, resin system and/or construction, and are provided with a specification sheet number for ordering purposes.

IPC-4103, “Specification for Base Materials for High Speed/High Frequency Applications,” covers the requirements for high speed/high frequency performance plastic substrates used for the fabrication of printed boards for microstrip, stripline and high-speed digital electrical and electronic circuits. This specification applies to the plastic substrate thickness defined in the specification sheet as measured over the dielectric only. Laminates controlled by this specification usually have a dissipation factor of less than 0.005.

 Source: Slashsheets Archive - Isola Group

Splitting Analog and Digital Ground - Don't Do it

See Rick Hartley and Robert Feranec - Splitting Analog and Digital Ground.

(100) Ground in PCB Layout - Separate or Not Separate? (with Rick Hartley) - YouTube

PLM Software - PDXpert

Simple, flexible product lifecycle management software for growing companies.

PDXpert PLM software: Simple & flexible product lifecycle management

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