BGA Packages - Lattice Layout Recommendations

"As Ball Grid Array (BGA) packages become increasingly popular and become more populated across the array with higher pin count and smaller pitch, it is important to understand how they are affected by various board layout techniques. This document provides a brief overview of PCB layout considerations when working with BGA packages. It outlines some of the most common problems and provides tips for avoiding them at the design stage. A key challenge of adopting fine-pitch (0.8 mm or less) BGA packages is the design of a route fanout pattern that maximizes I/O utilization while minimizing fabrication cost. This technical note provides an overview of PCB design examples provided by Lattice Semiconductor."

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Paste Stencil for 01005 Chips - Lead-Free

Process Development for 01005 Lead-Free Passive Assembly: Stencil Printing 

Solder past Stencils Design Guide

Solder past Stencils Design Guide:

Solder Paste Calculator

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Printed Circuit Boards: Final Finish Options

Printed Circuit Boards: Final Finish Options like Immersion Tins, Immersion Silver, Electroless Nickel /Immersion Gold, Direct Gold Over Copper: 

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Through Hole Sizes for Leaded Parts

What should the hole size be for a leaded through hole component ?

Factors to consider include:

Max lead size.
Min Hole size.
Solder flow through the lead.

Typically the finished hole size should be 8 to 10 mils larger than the maximum lead diameter.

Example:

If the component has a round lead with a diameter of 32 mils: 

Then the finished hole diameter should be 32 + 10 = 42 mils.

Note for square and rectangular shaped leads the lead diameter needs to account for the diagonal dimension of the lead.

Drilled holes in the PCB - Metric

Metric guidance lines for drill holes

Drilled holes in the PCB | Eurocircuits:

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PCB Fab Audit Service - Next Level PCB

Next Level PCB:

Interesting 3rd service provider for Auditing Pcb Fabricators and Contract Manufacturers

How to Avoid Printed Circuit Board CAM Hold

How to Avoid Printed Circuit Board CAM Hold: "How to Avoid PCB CAM Hold"

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Design For Manufacturing - DFM

Below are links to some excellent papers about DFM.

Design for Manufacturability of Rigid Multi-Layer Boards - Tom Hausherr

High Performance Multilayer PCBs Design and Manufacturability

Cost Drivers

Full Article Link: Drivers that Drive us Nuts | Judy Warner: 

• Layer count:  The first, and most obvious, is layer count. More dielectric material, more imaging, more etching, more plating, will all obviously increase the cost.
• Base Laminate: Laminates required for RF/MW or any high performance board can range wildly depending on the needs of the performance you require.
• Copper Weight:  Whenever the finished copper weight exceeds 1 ounce, cost will rise as the copper weight rises. In addition the etch factor becomes much more critical and challenging to control.
• Board size: For obvious reasons, the larger the board, the greater the cost.
• Buried and Blind vias:    Every time you add buried and blind vias you increase the number of lamination cycles, drill operations, de-smear and plating operations—all of which drive costs up.
• Sequential lamination: Required when buried and blind vias are present. Sequential lamination increases labor and prep time as multiple lamination cycles must be done for each board.
• Multiple Drill Operations: Also necessary when using buried and blind vias. More labor and drill operations=increased costs
• Hole density: This can be per board or per panel. The more holes and variety of hole sizes--the longer the drills must be active and drill bits must be monitored and changed accordingly. Drill bit life is monitored carefully by the drill programs. After so many hits—the drill will stop and the bit must be changed to ensure clean hole-drilling which allows for even plating to follow.
• Very small features and tolerances: Requires extra oversight and careful process control. Upgraded entry and back-up drill material to ensure against things like “drill-wander” and over or under-etching. Laser drilling may be necessary which also adds cost, especially if the fabricator does not have laser drills in-house.
• Non-conductive Via filling: When filling vias, not only do the via holes need to be filled, but they must be cured properly and then planarized. Obviously, adding three more operations will add cost.
• Conductive via filling: Conductive via-filling is much more costly than non-conductive via filling. There are tiny particles of conductive material present (which costs more), then it must be cured and planarized as well. Note: It is not recommended to fill a via under 8-10 mils with conductive epoxy due to the size of the conductive particles.
• Edge plating: Plating edges requires extra processing steps and a little bit of black magic which adds to the cost.
• No X-outs allowed: When building and shipping PCBs (multiple up) in panel form, some customers require that every board in the panel be a good board, with no X-outs allowed for defective boards. This forces the board supplier to run more panels in order to get the required yield to fulfill the customer’s order. This cost gets passed on.

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D-Sub Connectors - Minimum Mating Cycle Ratings

http://www.norcomp.net/documents/norcomp-contacts-mating-cycles.pdf

When selecting connectors you should consider the number of mating cycles. 

The durability and reliability of connectors is related the contact types and the plating.

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Chasing 'trons - Main:

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