Which Impedance Calculator is Right ?

Regarding controlled impedance calculators. What I learned in the IPC CID+ Class is that most impedance calculators only get you in the ballpark and that the only calculation that counts is the one that your fabricator uses to meet the design requirements.

Every fabricator has a slightly different process.  Some use more subtractive (Etching) processes while others will use more additive (plating) processes.  

Polar Instruments impedance calculator seems to be very popular with many fabricators. However, in addition to the calculator's results the fabricators apply their own correction factors based on experience.

You can send the same design with the same stack up and material call outs to a 2 or 3 fabricators and they will come back with different results and recommendations.

I typically use the Saturn PCB Toolkit to estimate trace widths, then consult with the fabricator when precise (+/-10%) controlled impedance lines are required.

There are plenty of free impedance calculators on the the internet, however you should consult with your fabricator if you need controlled impedance traces.

For FR4 materials the dielectric constant (also known as Er or Dk) can vary greatly from ~3.8 to 4.7.  And the Dk number in the datasheet for the material is the neat resin number. The neat resin number is the epoxy only Dk, before factoring in the fiberglass woven material.   

The final Dk and is a function of the resin type, glass type, and the ratio of resin to glass.  Also the glass weave can have a significant influence on controlled impedance of FR4 traces.

Here are three of the most popular glass weaves used in FR4 laminates.

 







That's it !

CAF RESISTANT STACKUP NOTES

Example Notes for Specifying a CAF Resistant Stackup.

1. Product must pass 1000 hr CAF testing (100V, 85%RH, 85C).
2. B Stage (pre-preg) is restricted to the following glass styles: 106/1067, 1080/1086, 2113/3313 and 2116.
3. C Stage (cores) must have a resin content > 45%.
4. Isola 370HR material is to be used.

Note 'e' glass materials with coarse glass bundles like 7628, 1652 are prone to CAF. 

Formal Stackups are Designed by Fabricators

Formal Stackups are designed by Fabricators, NOT PCB designers.

PCB designers create requirements that the fabricators use to design the stackup.

Fabricators can select from a wide variety of materials, like . . . 

Cores, PrePregs, Glass Weaves and Resin Contents

Fabricators make material choices that meet their manufacturing processes needs.

Here's what PCB Designers can and SHOULD do:

When requesting a stackup let the fabricator know if the design is using VIPPO or heavy copper.

Let the fabricator know if you have CAF concerns or if you need high speed glass.

For High-speed and RF you may want to specify materials that have low Df specs.

Specify the Desired Overall Board Thickness +/- 10%

PCB Designers Create Fab Drawings with Controlled Requirements, like . . . 

50 OHM 0.005" TRACES L1 REF TO L2 +/- 10%

50 OHM 0.004" TRACES L3 REF TO L2 AND L4 +/- 10%

100 DIFF 0.004" TRACES, PITCH 12 (GAP + WIDTH = PITCH)

RF TRACES

50 RB/CPW 0.020" TRACES, PITCH 30 L1 REF TO L4 +/- 10%

Designers can add notes to the project Fab Drawing, like . . .

Reference Only: Refer to Fabricator Stackup.

Customer Approval is Required for Stackup Changes.

The requirements in the fab drawing will drive the stackup designed by the fabricator.

PCB Designers can use various calculators to approximate the stackup, however the final stackup needs to come from the fabricator that is fabricating the PCB and performing TDR tests for the controlled impedances.

To expedite designs and minimize layout rework a formal stackup should be obtained from the preferred fabricator to optimize controlled impedances. 

Length matching may also need to be reworked if it is done before a formal (fabricator) stackup is obtained.

Summary: Working with a fabricator sooner, rather than later is highly recommended.

Abbreviations:

CAF is Cathodic Anodic Filament

Df is Dissipation Factor ( signal attention at higher frequencies )

VIPPO is Via In Pad Plated Over

That's it !

Laminate & Prepreg Manufacturing - Isola

When designing high volume PCBs is important to consider the regional availability of the materials used in the stackup.



Reference: Understanding_The_PCB_Laminate_and_Prepreg_Process

CAF Resistant Requirements: 

• Product must pass 1000 hr CAF testing (100V, 85%RH, 85C).
• B Stage (pre-preg) is restricted to the following glass styles: 106/1067, 1080/1086, 2113/3313 and 2116.
• C Stage (cores) must have a resin content > 45%.
• Isola 370HR material is recommended for cost sensitive applications.

Notes: 7628 and 1652 glass should be avoided if CAF is a concern.

'via Blog this'

TxLine 2003 - Impedance Calculator

One of my favorite Impedance Calculators is TxLine 2003.

This calculator is quite good, the CBCPW calculation is the best I have found.

Here a screen shot of the microstrip calculation.

For microstrip calculations, the Effective Dielectric Constant is derived from a combination of the resin, glass and air. It does not include the effects of soldermask. However it good enough to get you within 50 ohms +/- 5%.

Phase Constant

Phase Constant sounds like something complicated, until you realize it's nothing more than angular rotation of phase in degrees of a sine wave for a selected unit of length.  

In the screen shot above I intentionally manipulated the Dielectric Constant (Er) while keeping the electrical length set to 360 degrees until the phase Constant equaled 60 degrees. 

As shown the Physical length of the microstrip at 1GHz wtih a dielectric constant of 5.62213 equals 60 degrees per inch. So 6 inches = 360 degrees (6 x 60 = 360). Pretty simple math.

Critical Length 

We have often heard about the term critical trace length for high speed and RF designs. Most often you hear numbers like 1/7 or 1/10 of a wavelength as being the critical trace length.

The critical trace length is simply the length at which you must use a good transmission line to send transmit and receive signals and on your PCB.

Digital circuit designers are familiar with Rule of Thumb #1 Bandwidth of a signal from its rise time.

Educating the Customer

Here is a link to some good reading for PCB Stackup and Controlled Impedance.

https://randy-clemmons.blogspot.com/search?q=glass

That's it !

Stackup Request - Designer to Customer

We need to work with your preferred fabricator to create formal stackups.  

The overall board thickness, choice of materials (glass and resin) and the material Dk (dielectric constant) will determine precise trace widths and spaces for controlled impedance.

The ideal material for high-speed designs will have low a Df (dissipation factor) to minimize signal attenuation.  The length of the traces should be considered when selecting the materials.  If traces are short and wide then Df will not be a significant factor.  Low Df material is typically used on a high speed back planes and RF designs.  Note low Df materials are more expensive.

To maintain manufacturable trace widths as layer count increases where overall board thickness is ~80 mils or less the Dk needs to be lower than what is typically found on popular FR4 materials like 370HR.  FR408HR and GETEK are a popular choices for low Dk materials.

Fabricators prefer plated holes (vias) sized with 10:1 or less aspect ratio.  Where the aspect ratio is the overall board thickness divided by the drill hole size. 

Note drill/pad sizes 8/20mil (0.2/0.5mm) are needed to allow for routing diff pairs or two signal traces between the vias under 1mm pitch BGA and routing one trace between the vias 0.8mm pitch connectors.   

Please provide a email contact for your preferred fabricator.  We can work with your fabricator to design formal stackups and keep you in the loop (on the email threads).  

That's it !

RF Design Reuse - Stackup Comments

For RF design reuse the 50 ohm trace width, distance to RF reference plane and PCB material need to be tightly constrained.

A well designed RF circuit can be moved to another PCB stackup provided the RF trace widths and dielectric thickness to the RF reference plane are nearly the same.  

RF matching work will be needed to optimize RF performance after changing stackups.

The Dielectric Constant (Dk or Er) is determined by the ratio of resin to glass.

The Dk of the material and distance to the reference plane determines the trace widths of the controlled impedances.

Dissipation Factor (Df or loss tangent). Low Df materials are preferred for RF performance.

Layer stackup considerations may include high-speed traces on outer layers which will require a thinner dielectric (~2.5mil) between L1 to L2.   A thicker dielectric (~3mil) can be used with a few impedance discontinuities and imperfections, i.e. trace width neck downs on the outer layers.

Vias in Pad Plated Over (VIPPO). RF designers appreciate VIPPO because it reduces the parasitics associated with vias and traces connected to RF components.

For fine pitch components in the design use thru-hole vias with a minimum size of 0.2mm / 0.45mm (drill / pads) or 8/18mil and very sparingly use 0.2mm / 0.4mm (8/16) where needed.

Use 10/22mil vias where possible.  Vias hole sizes should be 15mil or smaller to accommodate non-conductive fill and plated over vias ( VIPPO).

For high-speed designs consider using blind vias or back drilling a few thru-hole vias to reduce stub lengths. 

Blind vias may be less likely than thru-hole vias to experience via barrel fractures from repetitive thermal expansion in the Z axis,  Blind vias can also be useful where RF isolation is needed.

That it !