Thursday, February 20, 2014

ESD Protection - Infineon

A Leading Company in RF and Protection Devices 

Infineon Technologies focuses on the three central challenges facing modern society: 

Energy Efficiency, Mobility and Security. 

Infineon offers semiconductors and system solutions for industrial/consumer electronics, automotive electronics, chip card and security applications. 

Infineon’s products have a reputation for leading-edge innovation, high reliability, and exceptional quality performance in RF, protection, analog, mixed signal, embedded control, and the highest efficiency power solutions. 

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Monday, February 17, 2014

High Speed Via - EE Training

High Speed Via:

Nice article about creating 50 Ohms vias.


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Friday, February 14, 2014

PDN - Target impedance

"One of the more common design techniques for power distribution networks (PDN) is the determination of the peak impedance that will assure that the voltage excursions on the power rail will be maintained within allowable limits, generally referred to as the target impedance. "

Full Article:
Target impedance based solutions for PDN may not provide realistic assessment | EDN

How-to-make-higher-voltage-power-distribution-network-measurements


PDN Tool V1:

Here is nice Java Script tool from EE- Training for PDN Calculations

















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Thursday, February 6, 2014

Concept Design for Daughter Cards

After dealing with poor fabrication yields for castellated daughter cards I tried to design a better mouse trap.

The biggest problem with castellated boards is router damage to via barrels as shown below.



Source:  Same Old Dog, Same Old Tricks, New Toys - Circuit Talk:

You need to qualify your fabricator very carefully for castellated boards. Be sure they have the experience and expertise to do the job right.  Many of the low cost off shore fabricators are still struggling with castellated board designs.


Concept Daughter Card


Shown below is a Concept Daughter Card.  I designed this solution to solve the router damage problem.

Note the use of the soldermask dams on the host PCB land pattern. The soldermask dams are intended control solder flow during standard SMD reflow process.

The Host Land Pattern Pads have also been extended beyond the body of the daughter card to permit hand soldering techniques to attach the daughter card. 

Solder can be feed through the VIA from the top side of the daughter card while holding a soldering iron on one of the extended pads of the host board.

Tinning the pads on daughter card and the host with solder is highly recommended for hand soldering.


























Below is screen shot of a GPS Interposer board which I designed to adapt a newer GPS module to replace an obsolete GPS module.












A nice feature of this concept daughter card design is the ability to inspect the SMD reflow solder joints by looking in the VIAs. 

So what's the catch, where is the gotcha ?

If you need to remove the daughter card it will not be possible to draw the solder under the module back across the soldermask dam using a soldering iron and wick.

To remove the module you will need to apply rework techniques similar to those used to remove and replace BGAs using a hot air rework station.


Feedback and Comments are Welcome.

Best regards
Randy Clemmons CID+