Transparent Via Design - Altera App Note 672

Transparent Via Design

Unless you are routing all transceiver channels with only microstrip traces on the top layer, you must use vias in the design to transition layers. 

Unfortunately, the characteristic impedance of differential vias are lower than 100 Ω. 

Generally it is in the range of 80 to 85 Ω. This impedance mismatch causes reflections that degrade the channel performance. 

To better match the impedance of the via with the 100 Ω differential traces requires optimization techniques that minimize the parasitic capacitance (Cvia) and inductance (Lvia) of the via.

Tip: You can minimize Cvia using the following optimization techniques:

• Reduce the via capture pad size
• Eliminate all non-functional pads (NFP)
• Increase the via anti-pad size to 40 or 50 mils

Tip: You can minimize Lvia using the following optimization techniques:

• Eliminate and / or reduce via stubs
• Minimize via barrel length by routing the stripline traces near the outer layers. 
• Use back drilling to minimize stub lengths.